Recent content by mince

1. about a spectre simulations ( no convergence )!!!

no convergence in operating point Make sure you set the delay on all of your pulses and sine wave inputs. If you don't do this sometimes you won't get convergence on complex circuits.
2. Is this a good way to place dummy transistors ?

1) You wouldn't connect the dummy gate to the other gate. You would ground it. 2) The additional capacitance from adding a dummy shouldn't be very much since you are sharing the source diffusion.
3. How to estimate the layout area of the power transistor?

Just do some math. I don't know how big your contacts are, but suppose they're .4x.4. If you make the layout 10 rows of 10 fingers each, plus maybe a dummy on each side then you'll have 12 * .7 = 8.4 um in total gate length. For the area between gates, you'll have .4 on each side of the...
4. Is this a good way to place dummy transistors ?

A better approach would to be one continuous diffusion. For your functional transistor, let the area between the two gates be the drain and the area outside the two gates be the source. Connect your source of the functional transistor to gnd as well as the gates and drain of the dummies.
5. help on high speed op/comparator design

Just use an open loop high gain OTA with a couple of inverters as the load.
6. asking help for solving a simple cmos problem

M is just a number. It should be W4 = M * W3....sorry about that.
7. asking help for solving a simple cmos problem

If I4 = M * I3 and W4 = M * I3, then Vo1 should be approximately equal to the gate voltage of M4. The VGS of M4 should be easy to calculate with the formula for current.

fastest adc A pipeline ADC generally several flash ADCs in series. Because of this you have a latency due to each flash. Plus you have to have opamps in a pipeline ADC and compensating the opamps limits the speed of the ADC. A flash ADC will be the fastest ADC you can have, but for it to have...

If you look at the topology of the MDAC and do the analysis on the switch cap circuit, you can find that the output will be Vo = 2Vin - Vref for the 1.5 bit/stage architecture.
10. source follower or emitter follower??

You may also want to look into the flipped voltage follower.
11. Looking for a soft copy of Analog IC Design by Johns and Martin

Re: Analog IC Design It's there. I don't believe you have enough posts yet. I think you need a minimum of 5 posts.
12. operational amplifiers amplification level

He was right. (R1 + R2)/R1 = 1+R2/R1
13. What's wrong with this bias circuit?

One thing that could be causing the trouble is that the gate length of M6 is only 0.6u while the gate length of M11 is 4u. It would be a good idea to have these two transistors having the same Vgs-Vth voltage. Since they will conduct the same current they should be identical in size. Right...
14. Can a dual supply OP-Amp be used with a single supply.....

Re: Can a dual supply OP-Amp be used with a single supply... Yes but you will have to add a DC offset to the inputs so that the input transistors will be active/saturation.
15. how to use the calculator of Cadence software

To see output in dB for an ac analysis: 1. Select VF on the calculator 2. Click on the wire where the voltage you want to see is 3. Click db20 on the calculator 4. Click plot