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Recent content by minaflying

  1. M

    How to deal with the sweep of Kvco on PLL system design?

    pll hspice kvco It seems that the VCO gain is not low, and the linearity is not very good. This is not good for PLL system, and also the phase noise performance will not easy to control.
  2. M

    L-C Oscillator - request for resources

    L-C Oscillator Hi Vijay, Most of the RF design book will talk about the L-C osillator, since it has a high Q solution, the phase noise performance will be much better. Iven
  3. M

    does anybody know any transmit line has low induct?

    it's realy 1m, maybe I can reduce it to half meter.
  4. M

    does anybody know any transmit line has low induct?

    thanks! but can we easy to get the 20nH inductance? the value is so small. and the transmit line is about 0.5~1m long.
  5. M

    does anybody know any transmit line has low induct?

    I means the series parasitic inductance of the transmit line. I want use it to test the Vdd noise on wafer, and I hope the parasitic inductance can reduce to less than 20nH.
  6. M

    high freqency noise test question

    I don't have the microwave probe, what's the benefit of the microwave probe?
  7. M

    high freqency noise test question

    I have a question puzzled me for long times. because I have to test the high frequency noise on wafer, but unfortunatly the power and signal line which conect wafer and equipment have large inductence nearly 100nH, how can I reduce this impact? and another question is my rf output noise signal...
  8. M

    how to define the loop bandwidth of Switching Regulators

    Re: how to define the loop bandwidth of Switching Regulator to Btrend: thanks for you ,can you tell me some detail about average swiching model.
  9. M

    Where can I found the concepts of poles and zeros in circu ?

    zeros and poles transfer circuit I think maybe too see the zeros and poles by some simulation tool is easy,but if you want to caculate them by hand,it's hard
  10. M

    how to define the loop bandwidth of Switching Regulators

    thanks,but how can I get this book
  11. M

    how to define the loop bandwidth of Switching Regulators

    This question have puzzled me for long times. for Switching Regulators (DC-DC converters) ,some times we only know the error amplyfier's bandwidth,because it's linear,that's easy to simulate and test.But for other models from PWM to output driver,they are working in switched mode not linear...
  12. M

    CMFB loop stability problem

    Re: CMFB loop stability I also want to know how to define de loop gain and loop phase of the CMFB and VFMB loop.In LDO loop,It's easy to do AC simulation to see the loop gain and pahse margin;but when the system becoms to switch mode ,how can we do?need to simulate the control to output delay?
  13. M

    How to design a mixed signal IC?

    mixed signal IC? Intel have little experence in analog ic,so if Ti want to win intel in the digital consume area, the mixed-signal IC is a very important thing to fight with Intel.
  14. M

    Whats the output of the third pin from a PC case fan?

    Computer Case Fan I have designed a cpu fan driver IC,the output waveform is just a square wave ,it only indicate the speed of the fan,the cpu and motherboard don't control fan's speed by this pin.
  15. M

    Looking for Tuner Module FM - No chip

    to egemini: I see the message is old,but I'm designing TEA 5757 now, can you email me some design documents to me? thanks a lot ,best regards! my email is minahua@sina.com

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