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I think you need to know ESD protection concept firstly.
I suggest you to study them in below two books,
ESD in Silicon Integrated Circuits, 2nd Edition
Ajith Amerasekera, Charvaka Duvvury
and
Basic ESD and I/O Design
by Sanjay Dabral, Timothy Maloney
Power supply lines in a chip are designed to be very wide so that EM and resistance effects are minimized. However, there is one problem with very wide metal lines that occurs when the temperature of the chip rised high enough to cause the metal to expand signigicantly.
If the metal expands...
Course Description - Design of memory circuits with an emphasis on DRAM. The course will provide detailed information on the transistor level design of memory circuits. Other memory technologies including Flash, MRAM, Glass-based, and SRAM will be discussed. The course will be a practical...
verilog vcd viewer
There are two free Verilog waveform viewers:
WaveViewer by SynaptiCAD is a free Verilog VCD waveform viewer. WaveViewer also imports waveforms from HP logic analyzers, TDML documents, and many gate level simulators. The viewer allows the placement of markers, delays, setups...
silos 3 verilog simulator
There are three free Verilog simulators available with limited capabilities:
SILOS III from Simucad.
SILOS III's high performance logic and fault simulation environment supports the Verilog Hardware Description Language for simulation at multiple levels of...
verilog ebook
Some useful Verilog ebook
Prof. Don Thomas, carnegie Mellon University.
The Verilog Hardware Description Language
**broken link removed**
Dr. Daniel C. Hyde's Handbook on Verilog HDL.
A short but in-depth introduction to Verilog HDL.
**broken link removed**
Gerard M...
transmission line design pdf
Hi ulderico,
I think here will be the good web site that you can found some materials.
http://www.amanogawa.com/transmission.html
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