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Hello to everyone,
currently I'm designing an active RC filter, it is a CR-RC2 Pulse Shaper. The technology process is TSMC 180nm (Link: **broken link removed**).
I have to implement the resistors of my filter. It is known that their values cannot be accurate defined due to process variation...
Hi Junus,
it seems that you have a problem with the Class AB bias generator. If you plot Vod vs Vid, there is little range for Vid (centered at 0) where Vod = 0, generating crossover distortion. Maybe you are not properly biasing your output transistors, so there is a little range where neither...
Hi Junus,
it seems that the problem is related to the CM output voltage which is not well defined. Since the output of the first stage is very high impedance, little changes in the current would change the CM output voltage considerably. Also, in the single-ended version, the current is defined...
Hi,
you could check this book: https://www.amazon.com/Systematic-Design-Analog-CMOS-Circuits/dp/1107192250/ref=sr_1_fkmrnull_1?crid=3VIQI4NEVA2LQ&keywords=systematic+design+of+analog+cmos+circuits&qid=1550334148&s=gateway&sprefix=systematic+des%2Caps%2C241&sr=8-1-fkmrnull
"Systematic Design of...
The CMFB works this way. Rcm1's sense output common-mode voltage which it is attached to the source of M51 and M52. The gates of M51 and M52 are at the same and constant voltage, generated by the diode-connected transistor M53. If the CM output voltage goes up, then VSG51,52 goes up, and...
Hi Junus,
can you show simulations of what isn't working? As frankrose said above, it would be useful to give DC annotations, in order to check whether the transistors are operating in the active region. Here some notes:
1) Since you are designing a fully differential architecture, no...
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