Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
thank you all ! I solved it, I talked to one from Intel and he advised me to install the NEW version of software because the one I have has these problems. (ModelSim-Altera 6.6d) With the new version the clock is generated without problems in the way you want.
Hi guys, I tried to apply the stimuli using modelsim to the sequential adder that I described in vhdl.
1) I tried to generate the clock signal like this: here is the screenshot:
But doing so it does not work,
num1 is the first number to be added
num2 is the second number
s, the result...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.