Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by maro.pitti

  1. M

    [SOLVED] Modelsim clock signal

    thank you all ! I solved it, I talked to one from Intel and he advised me to install the NEW version of software because the one I have has these problems. (ModelSim-Altera 6.6d) With the new version the clock is generated without problems in the way you want.
  2. M

    [SOLVED] Modelsim clock signal

    But this problem can only be felt with the clock, because the other signals such as the rst (reset) are correctly applied with the "CREATE WAVE" mode.
  3. M

    [SOLVED] Modelsim clock signal

    But why in the first case I was wrong?
  4. M

    [SOLVED] Modelsim clock signal

    Hi guys, I tried to apply the stimuli using modelsim to the sequential adder that I described in vhdl. 1) I tried to generate the clock signal like this: here is the screenshot: But doing so it does not work, num1 is the first number to be added num2 is the second number s, the result...

Part and Inventory Search

Back
Top