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@Keith
Thanks for your insight and I really appreciate your help. I definitely looking into passive elements while trying this design that you proposed. Do you have any suggestion for books or articles that has more detailed filter design ( including GIC Ladder topology you proposed. )
I am...
@ FvM
I agree. But I concern about the ability to simulate the parasitic impedance with PSPICE, plus I also need to incorporate a gain stage right after that. I was thinking using active filter that may simplify the design.
By the way, that is for a 0.3dB p-p ripple LPF.
@keith1200rs
Thanks for your comments. I was looking into Sallen & key topology. Analog Devices has an 1GHz op-amp, AD8045 that meets my requirements. The tricky part for this implementation is the low resistor value ~3.5 Ohm , with preset resistor at 1K Ohm and 56pF cap. I am not familiar...
Has anyone try 7th order chebyshev LPF cutoff at 68MHz? The R value is too small for active filter. I am going to try lumped element filter design instead. But how do you simulate the parasitic in ORCAD PSPICE?
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