Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by Manuv16589

  1. M

    Frame and frame frequency in LCD

    Hi, I was going through LCD datasheet. It says frame frequency is the rate at which backplane(COM) and frontplane(SEG) outputs changes. I am unable grasp what is that. What actually a frame is? Can somebody elaborate on this?. Thanks in advance.
  2. M

    Relative paths as headers in C

    Hi there, I have seen a program with include as follows: #include "../../Host/myfile/header.h" What is meaning of this? What does ../ indicate? What does this relative path represent? Thanks in advance.
  3. M

    Need more explanation on Hypergraph

    Hi there, As far as i know an hypergraph is a generalised graph with a edge connected to any no. of vertices. Can anybody elaborate this and provide more info. with a good example of drawing a hypergraph? Thanks in advance
  4. M

    [SOLVED] What does each letter stands for?

    Thanks for the ans
  5. M

    [SOLVED] What does each letter stands for?

    What does each letter in PIC24FJ128GA010 stands for? Thanks in advance:lol:
  6. M

    Need of jumpers on motherboard

    What is a jumper? What is its need on motherboard
  7. M

    More than one Segments in 8086

    Hi there, Since the segments of 8086 can overlap can we have two code or data segments? Also there is only one segment register for each?If it is possible how?
  8. M

    Cmos static power dissipation

    In 'Cmos digital integrated circuit by sung mo kang' there is a line that states "static power dissipation is very small and is essentially limited by leakage current of pmos transistors". How does pmos helps to reduce static power? Thanks in advance
  9. M

    Dc offset in ac signal

    Hi, I just wanted to know how does the dc offset value in ac affects the output in differential amplifier as given in razavi's design of analog Cmos ic circuit page no. 103
  10. M

    Power analysis using tanner tool

    Hi there, I am very new to tanner. I dont know how to do power analysis using tanner. I have found in this forum that tanner cannot be used for power dissipation analysis. But in one of the paper sram power analysis has been done using tanner. So i require some inputs on this from tanner tool...
  11. M

    Signal gating in full adder

    Hi there, Signal gating is a way in which switching activities is reduced. But how it is implemented for full adder. Please provide info. Or any links will be appreciated. Thanks in advance.
  12. M

    Problem while using tanner

    Absolutely...thank u very much godfreyl. I was struggling to make out the mistake. Its working now.
  13. M

    Problem while using tanner

    when i was not getting the output i just decided to check the supply. I removed the inverter and when i saw the output i was getting only the ramp. What might be the problem. Plz help.
  14. M

    Problem while using tanner

    Hi there, I am very new to tanner tool. Hence i was trying to familiarize the tool by drawing the schematic of inverter. I am trying to simulate using by applying pulse. But at the output i am getting a ramp i.e the input itself i am getting as ramp. What is the problem? Please help.

Part and Inventory Search

Back
Top