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Recent content by manush30

  1. M

    pcie hard ip altera- latency problem

    My state machine working great. I did simulation and not suffer with such a problem. If I increase the Burstcount to 64 bit, sometimes it's work and sometimes not. But still, I need to work with 16b transfer data
  2. M

    pcie hard ip altera- latency problem

    Hi, i'm writing a code to injection data to another board through PCIe. I'm doing it with Avalon MM master/slave. The parameters are: Burstcount- 10h Readdata -64b In the Avalon MM, when the read request asserted low then after numbers of clocks the readdatavalid goes high. After is we can...
  3. M

    LS-11D switch counter

    Hi, the input impedance is 4.7k and according to my calculation the voltage will be 11.6V (high logic is 4.5-30V, low logic 0-2v) Here the datasheet link: **broken link removed** pls refer to H7EC-NV-BH (pg. 2-7) I still didn't order it yet. So i cannot attach any scope images.. It seems it...
  4. M

    LS-11D switch counter

    Hi, Sorry about it.. LS-11D is a limit switch. What i have done so far: I connect the limit switch to a breadboard with 24V PS pull up(5k ohm TH resistor) The limit switch can be connected N/O or N/C. I choose to work with NO. The limit sw is inside a closet with a drawer (cartridge). I...
  5. M

    LS-11D switch counter

    Hi, I want to use this limit switch "on table". Meaning, I have this component and want to count the times I "close" it. I'm gonna use a cartridge with mechanical set up which close the limit switch and release it. There is any ideas. I thought to do it with an Arduino, but how to start:-(...
  6. M

    On off register to activate each load...

    Thx a lot. See below the code.. Begin process(mclk, reset) begin if all_rst='1' then load_reg <= x"1ff"; elsif rising_edge(mclk) then case load_reg is when x"000" => load0 <= '0'; load1 <= '0'; load2 <= '0'; load3 <= '0'; load4 <= '0'; load5 <= '0'; load6 <= '0'; load7 <= '0'...
  7. M

    On off register to activate each load...

    Hi friends, I try to write a code but i sure there is more simple way to do it.. I have 8 components on my board that i can do them on/off switching. I get 8bit register(each bit for each load) and choose wht of the load will activate. I thought to do it with "case" statement but i will have a...
  8. M

    Circuit protection with VHDL code

    Thx you a lot Klaus. 01, 10 and 11 are the states the load is enabled( see above the code i were write) XOR were good in the states you mention(01,10). If will add one more bit to the register for "busy" state, it will complicated my design?
  9. M

    Circuit protection with VHDL code

    It will not work.. I will explain. I have 14 bit register( 7 loads, 2 bit for each load). Supposed i will write 0x0005 it's meaning i will activate 2 loads, and i have 2 "ones". In this situation my VHDL code will not enable the output because counter >2 means erro. But we have 0x0003...
  10. M

    Circuit protection with VHDL code

    Thx a lot Klaus. If i understood u suggest to add adder of '1' and compare it to each bit of the register load..? It will be very tedious8-O Result >2? Sorry i didn't understand... If I add each bit 1 it never could be greater from 2(max 2) One more things, counter for '1'-es, case statement...
  11. M

    Circuit protection with VHDL code

    Thx KlausST. When Two or more loads will activate together the power consumption will be high and the fuse will be burn---> thus I want to activate only one load e There is not priority for the loads. "don´t activate any load at all in case of more than two are tried to be activated." Its not...
  12. M

    Circuit protection with VHDL code

    Hi guys, I need help with a code i trying to write. I have I2C communication between my board(FPGA) and the embedded CPU. To activate some load we need to write 14bit register to the FPGA. I have 7 loads. Each load consume almost 1.2A.(I have 2A fuse ) I do it with H bridge topology on my...
  13. M

    I2C delay between SCL and SDA

    Thx bking. I have a timing problem. I have this chip https://media.digikey.com/pdf/Data%20Sheets/Atmel%20PDFs/ATECC108_DS_Summary_1-27-15.pdf acting as slave. I cannot communicate with him because it doesn't synchronized to SCL (I2C specification). I try to do it by delaying the data for 1us...
  14. M

    I2C delay between SCL and SDA

    Hi all and Sorry about the ignition (i've been sick 8 days:sad:) The problem was with the GPIO driver i had in my board. it doesn't recommended for I2C lines( https://www.nxp.com/docs/en/data-sheet/NTB0104.pdf page 19) I've changed my system and try to delay only the SDA. I've work with I2C...
  15. M

    I2C delay between SCL and SDA

    Thanks a lot bking. Still it doesn't work.. I've changed the process but still i did not see the delay :bang:
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