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Recent content by ManojG

  1. M

    facing problems in synthesis

    Adding a code like this will create a feedback path in real hardware. Does this feedback path will create any problems? else begin alternate_regfile <= alternate_regfile; primary_regfile <= primary_regfile ; end
  2. M

    is it a bug of Design Compiler ?

    Hi Eng Han, Please forgive my ignorance. I have one doubt regarding the statement SDFFRX1 ( .SI(en), .SE(din), .D(1'b0), .CK(clk), .RN(rst_n), .Q(dout)); == SDFFRX1 ( .SI(din), .SE(en), .D(1'b0), .CK(clk), .RN(rst_n), .Q(dout)); As per the RTL whenever the en == 1'b1 dout <= 1'b0; As per the...

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