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Recent content by mangalji

  1. M

    Testing OTP memories on ATE

    Hi Sunnyskyguy, I am not able to understand. can you refer me somewhere?
  2. M

    Testing OTP memories on ATE

    What if OTP is going to be programmed by end User?
  3. M

    Testing OTP memories on ATE

    Hi, Can anybody explain how to test OTP memories on ATE? Since it is one time programmable, we can not simply program and read it like RAM. How can we verify that, the OTP memory that has been fabricated is good to go?
  4. M

    Design Compiler To RTL Compiler scripts conversion

    Hi, Is there any way to use Synopsys DC commands and DC scripts in Cadence RTL Compiler ? Any utility that performs literal transition of DC scripts into RC scripts, will be helpful.
  5. M

    [moved] Tessent MBIST using ETPlanner

    Yes, I have Tried it but seems like it is not working.
  6. M

    [moved] Tessent MBIST using ETPlanner

    Hi, I am trying to insert MBIST using mentor graphics tool. CADEnvironment{ LayoutTool: BlastFusion | ICCompiler | TalusAcc | TalusVortex | (Other); CreateDirectoryCommand: <mkdir Command>; CreateSoftLinkCommand: <ln -s command>; DefaultSimulator: Verilog-XL | NC-Verilog |...
  7. M

    Cadence MBIST using ET and RTL compiler

    programming PMBIST, Cadence Hi, I am new to cadence PMBIST. Can anybody tell me how to program it after insertion? I mean once it goes on silicon.
  8. M

    Cadence MBIST using ET and RTL compiler

    Hi, I have cadence Encounter Test 14.20 and RTL Compiler 14.24. I want to do MBIST using this licences. Is it going to affect the flow with respect to Encounter 15.20 and RTL Compiler 14.24?
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