Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Thank you for ur kind information.
But there is no specification of the clock ......and i have been asked to calculate the set up for the total circuit. Is there any possibility to calculate the setup time for the whole circuit instead of a flop?? Please clarify..........
Hello Friends,
I am giving a problem which has recently asked me in an interview. Please if u find the answer let me know. Thank u.......
Prob: There is a flop of internel setup time 100ps. and the clock line to that flop has a buffer(Inverter+Inverter -- having both 20ps each delay). So...
Re: physical design openings in india
Hello Deepa,
I am Madhu, a master degree holder in VLSI Design. I am looking for an entry level position. If u can find the same any where in your circle, Please help me by intimating me at my mail id: madhunandyala@gmail.com
Thanks in advance....
Waiting...
Hello Shitansh,
I am Madhu N, i am also planning to do a small academic project as u all said above. I have only Tanner tool that will not support coding and all the remaining things. Would u please tell me a free or cracked tool which does from RTL to GDSII? Please help me...
Hello,
I am Madhu, a fresh post graduate in VLSI Design... what u have said above that is absolutely best way to enter into the back end. There is nothing to do wid front end.. In fact i am also searching for the same kind of job. If u know any that sort of opening pls intimate me. My mail id is...
Hello Everybody,
Greetings of the day..
I am Madhu Nandyala, a master degree holder in Engineering with VLSI as my specialization. I am looking for an entry level position in industries work with VLSI. I am good enough in digital, verilog HDL, Testing concepts, CMOS VLSI Design and Spice...
Hey buddy,
I am also having an ME with VLSI , but unable to find the openings. If u find the same please forward me the details about the openings. I am ready to come any place for an interview.
Thank you..........
Regards...
Madhu N
Hello Vikram,
I am a fresh Master degree holder in VLSI Design, i am interested in your project, i have already sent my CV to you to the provided mail id, my mail id is madhunandyala@gmail.com .....please give the information of the further proceedings.......
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
