Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by lukegeorge

  1. L

    Frequency dependence in veriloga module

    Dear, thanks for the response and for posting the links. I read carefully your post about the use frequency as variable in SP simulation, but I still didn't understand the correct use of the frequency. I try to explain better my problem. I created a veriloga module and I created a two-port...
  2. L

    Frequency dependence in veriloga module

    I was able to write a veriloga module in which I had the implicit reference to the frequency V(out) <+ laplace_nd( V(in), {1}, {1,1/sin(freq_p1)} ) but I'm still tied to the Laplace transform to handle the frequency. Is not possible to treat frequency as simple variable ? Like If I already...
  3. L

    Frequency dependence in veriloga module

    Dear, thanks for the reply. I don't understand what you mean with the use of the Laplace function. I only have the Vin/Vout behavior in the frequency domain. Is there a way to systematically add the frequency dependence via parameter or other ? Thanks, Luke
  4. L

    Frequency dependence in veriloga module

    Dear all, I'm new to this forum and also in the veriloga module design. I'm trying to design a veriloga module in which I have to impose a simple Vin/Vout behavior, and I need to impose the frequency dependence in the law. I made something like this: module my_device(in,out); input in...

Part and Inventory Search

Back
Top