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Thx Havi,
I used the method you described last week for my last order. The board outline originally drawn on global layer has been copied on another free layer (sst for us). But I had had to add comments in my email bound to manufacturers to explain this trick. This solution seems not to be...
Hi,
I am currently working with OrCAD Layout 9.2 to design my PCBs and the board outline is not automatically generated by the post-processing. Some PCB manufacturers accept board outline description on an additionnal layer (SST for example) or document but it is not always the case... Am i...
We are designing PECL Logical functions and we have several questions about such a design.
1)how to produce the PECL termination power supply (1.3V sink). Now we use standard regulators "reverse" mounted (Gnd pin connected to 3.3V) but maybe there is a better solution.
2) about termination...
Hi Arsenal,
Excuse me but i don't see where is the problem. The electric field depends on the voltage Vgs. The leakage current before breakdown too. The breakdown corresponds to a critical electric field that is fixed (included in the process variations) so braekdown will occur for the same...
It is a question of avalanche multiplication process which provides an internal gain. An incoming photon produces an electron-hole pair that are accelerated in opposite direction by the electric field. These carriers may collide and ionize atoms, producing other electron-hbole pair. Below the...
Hi guy,
Sorry but I have no schematic or paper at work. A quick research lead me to a generale paper describing SRD, and pulse generation at follwing adress http://www.medphys.ucl.ac.uk/research/borl/homepages/davek/phd/chapter5.pdf. Effectively the papers I mentionned are no more available on...
pico generator
Hi,
I worked on UWB band pulse generation and I designed a solution based on a specific diode, a Step Recovery Diode. This component can generate rise time step smaller than the ns (can reach 100ps with appropriate design). It Consists in storing charges in the SRD with forward...
I don't know if it is the right forum for this question but I would like to know if I a can use classic Alloy (with Pb) to weld on PCB Pb Free Component. I think so but.... Thanks
Flatulent is right. These vias are mainly useful close to the RF tracks on the Ground plane Edge. They have to be separated by a distance less than λg/10 with λg= Co(light velocity)/(fo * √εr).
Added after 44 seconds:
Flatulent is right. These vias are mainly useful close to the RF tracks...
To Reuse a OrCAD project
Hi,
Does anybody knows how to start from an existing design (schematic+Layout) to create a new design. The procedure seems not to be so simple. Thanks for help.
Hi,
With a 1.6mm thick board, the width of a 50R track is effectively too wide. Then you can work with 4 layer board and a thinner Top to bottom layer. Or if it is posiible you work with higher impedance tracks (it is the case if you work with high speed logic circuits by example). Please let me...
Re: Oscillator Desgin for RF
Hi,
I know three different crystal oscillator structure, Pierce, Clapp and Colpitts. The Colpits consists in connecting the crystal to the transistor base, the emitter (the output) being reconnected to the base through a capacitor bridge. The transistor is...
Power Mosfet have to be used in their ohmic region. The gate voltage Vgs you apply have to be high enough compared to Vds to be in this region, following the next formula Vds<Vgsoff. For the IRF260 the Vgsoff is between 2 and 4V as said in the ds then I think you are working in the active...
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