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Re: Circuit conferences
Hi, both of them are good too and gatteing the acceptance is hard...
Anyway you can check some of ISSCC, VLSI conferences papers and if yours is in that level, send it to those conferecnes, because I know in ISSCC papers, the authors show their chips... In circuit...
32k bytes =
Hi everybody,
I want to design a 1024*32 kbytes SRAM array with Hspice. I have some problems: :cry::cry::cry::cry::cry:
1-How can I model long bit line wires?
2-How can I define this big circuit in Hspice 2007?
3- Do you know a paper that model the lines in SRAM?
Bests, lili
Hi everybody,
I want to design a 1024*32kbytes SRAM array with Hspice. I have some problems: 1-How can I model long bit line wires?
2-How can I define this big circuit in Hspice 2007?
Bests, lili
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