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Hello, I am using an asynchronous-read ROM, to store a matrix.
It has to be parametrizable, so the columns and rows have to be defined by generics.
I was wondering how I can store something of a different type in each address. I have only previously stored a binary number at each address in...
Is there any way around point a without using VHDL 2008?
Do you mind expanding point b please? I'm new to VHDL. Thanks
ie creating a c_local signal, is this an internal signal inside module X which is then assigned to module X output?
Lets say that the top level contains module X.
Module X has inputs A, B of std_logic_vector and outputs of C and D (also std_logic_vector).
Module X contains within its architecture (using component/direct instantiation) Module Y.
Module Y has inputs M, N of std_logic_vector and outputs E, F...
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