Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by lg3

  1. L

    [SOLVED] Treating pushbutton events to implement up/down counter in verilog

    Hi ads_ee, I am not sure If I understood what you meant by "synchronize inc & dec", could you please explain a little more?
  2. L

    [SOLVED] Treating pushbutton events to implement up/down counter in verilog

    Thank you very much TrickyDicky! I was stuck into thinking about using the "inc" and "dec" signals as clock, I didn't know there could be only one signal acting as a clock. So that's how my code look right now : reg inc_reg, dec_reg; integer number; always @(posedge clk or negedge rst)...
  3. L

    [SOLVED] Treating pushbutton events to implement up/down counter in verilog

    Hi everybody, I'm trying to implement in an Altera's DE2-70 board (which has an embedded Cyclone II) an up/down counter, which counts up when a press one pushbutton, and count down when a press another pushbutton. First I tried implementing just the up counter, which looked like this ...
See more

Part and Inventory Search

Back
Top