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Hi Terry,
In answering your first query, Allen is emphasizing the importance of 1/f noise not only at low frequency, but also at high frequency around clock frequency. He then gives high frequency MOSFET VCO as an example.
This is to clear our common misunderstanding that since 1/f noise is...
Re: help !cadence !
cadence manual and reference provide more than enough information. Open up the design environment and try out, refer to the manual when you are stuck.
Happy learning!
Not true.
there are two main contributors to the offset,
the systematic offset and the random offset,
by considering a fully differential amplifier, everything is symetrical, you may get a small enough systematic offset,
whereas random offset depends on transistors' matching, so it's...
Re: transfer layout to GDSii
Hi Loverrf, a search on google returned me this, maybe helpful to you to understand what the streamLayerMapTable looks like.
https://www-bsac.eecs.berkeley.edu/~cadence/tools/layermap.html
I am sorry sunjiao3, I forgot to mention that I had no startup circuit with my problematic bandgap circuit.
To study the effect of the startup circuit, I have had the opportunity to build two bandgap circuits, one without startup, the other one with startup, the rest are the same. For both, an...
Re: question on mismatch
very very unlikely you will get one slow, one fast.
those corners are to take care of absolute vairations from lot to lot, run to run.
A starup is always required for the actual circuit to start properly everytime you power on.
I had a very bad experience, my bandgap couldn't start. Really! It couldn't start. The problem with your simulation is, it never takes care of the offset. I later figured out it's due to offset issue...
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