Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hello, I was designing a divider in millimeter-wave frequency, and need to input a differential signal into the port. But the difficult for me is that how to generate the differential signal during my experimental exam. I have read some papers, which suggest that using a signal source to...
I have tried the PEC's methods, but there are still the same errors, just as the pictures shown. Thank you for your help, may I have your e-mail adress please?
thanks for reply. This is my work, I use MA metal(red one) and the E1 metal(pink one) for the inductor, the vias is the green ones. The cyan one is the guard ring use the MA and E1 metal. Under the inductor, it's a shield using M1. The problem is when I use the lump port (p1&p2), just as the...
Hello, I have seen your inductor's model, but I have some questions. First, have you set the thickness of the Metal 6, if you setted up, how to get the lumped prots. Second, does your model exactly with the real one?
Thank you for your reply.
Hello,
Just as the photo shown, I was design a LC-VCO at millimeter frequency, and I must get the accurate S_parameters or Q-factor of the IBM symmetric inductor, but it's difficult for me to model the inductor in HFSS, for different parameters of the inductor, the different moder of ind I have...
Hello,
I am design a LC VCO which the oscillation frequency is about 40GHz. In such a high frequency, the problem that i meet is, firstly, how to get accurate inductor, does it need to simulate the inductor model in HFSS to get it S_parameters, and how to get it? Secondly, with the experence of...
Hello,
thanks for your explaintion. I just get over this problem. Do you know how I did it? Neither insert layer nor the area, which I try first is not avilialbe, I just decrease the vias from the NW to M1, just leaves 1/4 of the orginal. I don't know why to do this, but which is very useful.
Hi,
when I do the Calibre exam, I confused with a DRC error-------GR594, does anybody know how to correct it? By the way, I use IBM .13um.
ths very much.
thanks. I have already solve this error. It all because model library, the latest version does not work very well, so I come back to the earilier version, and all are correct. Nevertheless, thank you very much!
Thanks for your reply. Recently my lab's assura didnot work very well, because there are some mistakes in it. So we just can only rely on Calibre. Maybe I think it depends on IBM .13um or Calibre, not my faulty.
Regards,
Lamar_sue
Hi, leo_o2
I just show you the pictures which I make some notes on this,but the cross section? Sorry, I didn't understand very well, which part do you refer to............
Thanks for your reply.
Re: ibm cmos 13 course
P.S: I'm a new designer. I didn't understand the VSS line you mentioned in the replay, do you mean the terminals(drain and source) should connected just as the schematic, and the body terminal should connect with the subc with the VSS line?
Hi jimito13,
for the first question, I will show you my simple 'nfet' design. Just as you have seen, I have got subc around my nfet, and get the subc connected with the 'GND' on the M1 metal layer, but I cannot pass the LVS test. By the way , I use IBM .13um. Calibre.
the second question, I...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.