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Recent content by lahrach

  1. L

    MATLAB to automatically create a wireless network.

    Hi, How can I insert a curve in the same figure best regards
  2. L

    Testing for vlsi design

    Hi, Try to test CLBs in SRAM-based FPGAs using a BIST technique for example. Good luck
  3. L

    About ISE Xilinx software

    Hi friends, Where can I found the Xilinx Design Language XDL of my design best regards,
  4. L

    Need Help on VHDL to write a Finite State Machine

    Hi friends, I need to write a FSM that do this work: Send N bits and receive the N bits then compare the N bits sended and the N bits received best regards,
  5. L

    [MOVED] Intel 8051 Verilog Code

    You can use this link:
  6. L

    Fatal Run-Time error Dereference of null pointer

    Hi friends, I'm using LabWindows/CVI for my project How can I resolve this error: Fatal Run-Time error Dereference of null pointer regards
  7. L

    Generating BRAM with core Generator

    Hi friends, why the wea signal is written as wea : in STD_LOGIC_VECTOR(0 downto 0); How to instantiat it? thanks,
  8. L

    About Modelsim software

    Hi, How can I dispaly the names of a FSM in modelsim I'm using VHDL as language regards
  9. L

    VHDL code for a Finite State Machine with several transitions

    Hi firiends, I'm asking how to encode a FSM with several transitions Example: state_0 -----> state_1 ----- ---state_1 ------state_1---------state_1 -------------state_0 regards
  10. L

    read and write data from/to ram of fpga

    You can use Coregenerator to generate a BRAM good luck !
  11. L

    VHDL code for a Finite State Machine

    thank you for this answer
  12. L

    VHDL code for a Finite State Machine

    For example: consider this FSM FSM={state_1, state_2, state_3, state_4, state_5, state_6, state_7} signal start : std_logic; when statr<='1' state_1 ->state_2 ->state_3 ->state_4 ->state_5 ->state_6 ->state_7 ->state_1 regards
  13. L

    VHDL code for a Finite State Machine

    Hi all, How can I encode a state machine such that when I click a button it run all possible states. regards
  14. L

    About IOs of Xilinx Virtex-5

    very beautiful answer
  15. L

    About IOs of Xilinx Virtex-5

    Hi friends What is the speed of IOs of Virtex-5 regards
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