Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by kvsim

  1. K

    Verilog-XL compile problem

    well, It works. there is another question: If cell A has a hierachical cell B in library lib_a, there is a cell name B in library lib_b too, how could I make the cell B in lib_b priority ( Let Verilog-XL compiler using cell B in lib_b, not the cell B in lib_a) Thanks & Best Regards
  2. K

    Verilog-XL compile problem

    Dear all: I have module abc in both filea, fileb and filec , is there any method to compile module abc in fileb, other than modify filea and filec. Thx!
  3. K

    How to design Sigma Delta ADC?

    sigma delta applet analog devices Hi guys: If u want to design or simulate a SD-ADC use Matlab, the Delta Sigma Toolbox by Richard Schreier maybe help. https://www.mathworks.com/matlabcentral/fileexchange/loadFile.do?objectId=19 Summary: High-level design and simulation of delta-sigma...
  4. K

    How to interface ADC with 8051?

    Re: interfacing adc It's AC or DC Voltage would you want to sample? as AC power calculate there is a series of Power meter IC. it would work better.
  5. K

    what a frequence can RC Oscillator reach?

    What about practice refer to stability ect. THX!
  6. K

    what a frequence can RC Oscillator reach?

    what a frequence can a build-in RC Oscillator reach? 4MHz or high?

Part and Inventory Search