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I have a design like this,
always @ (posedge X) begin
if (Y) begin
A_main <= 'b0;
A_x <= 'b0;
end else begin
A_main <= A_d;
A_x <= ^d;
end
end
assign A_copy = A_main;
assign A_d = d;
assign F1 = A_x ^ (^A_copy);
assign F2 = B_x ^ (^B_copy);
.
.
and so on
Here A_main and A_copy are 32 bit...
Thanks. But this looks like it takes multiple library files. But how to write multiple reports. I was guessing, we should use variables names at the end of the report files, like counter_timing_$LIB_NAME1.rep. Also does it take care of choosing the best library?
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