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op-amp configuration
Hello
now I'm making an OPAMP
I have question about bias voltage
The Opamp what I made is very simple. 2stage
Vdd is 1v.
I think it works well.
but I got a ploblem with this schematic
(plz refer my attatchment)
I didn't work at all.
(V24) is signal and (V23) is...
Hi
I have questions about SARADC
my analog signal is 0 hz ~ 15Khz
and my VDD is 1V , 0.18um
Power consumtion shold be low as possible
In this condition, SAR ADC is a good choice?
Is it difficult to implement 10bit SAR adc?
(because ADC is not my thesis, I should save time )
I have...
Hi~
I made J-K flip-flop, but it doens't work properly
(I attached my schematic and results)
output of Q_b looks OK ,but Q is not right
Nand and Nand_3 works well.
I thought JK flip flop is quite easy though...
Please give me some advice
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sigma delta adc resolution relation
Hi,
for sensor application, I've to design a 12bit(minimum) Sigma delta ADC.
I have some questions..
I guess lots of sigma delta modulators are using a fully differential opamp for integrator.
Do I have to use fully differential opamp for 12 bit...
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