Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by kimthi

  1. kimthi

    What's the advantage of getting ccna1 and ccna2 certificates?

    ccna1 and ccna2 Yes, You need to update your knowledge about it.
  2. kimthi

    about proxy settings in LAN

    Hi all, Anyone please specify some documents about the setting of LAN/WAN networks. I want to study about them. Thanks
  3. kimthi

    The difference between CCNA and MCSE courses

    mcse course in malaysia Hi all, If I want to study about setting of LAN and WAN network. May be I'll study both of them?
  4. kimthi

    Where do the DRCs come from?

    DRC Calibre specify the locations of DRCs. Depend on rules for layers in standard cell (below Metal 1), you can use Slam to understand & fix DRCs clearly.
  5. kimthi

    Advantages of having positive slack

    +ve Slack Sometimes, To have a good timing: zero slack is better than +ve slack.
  6. kimthi

    Voltage level in cell and power gating switches in multi-Vdd design

    Multi-Vdd design What's AON cell? Is it always_on cell? Do we use it in multi-Vdd design? The function of AON cell, retention flop, power gating switches and enable level shiter? Do you know about them? Plz tell me ...
  7. kimthi

    Library for multi-vdd design

    Ya, I had just read about multi_vt library. But I want to know about other standard cells. different from multi_vt standard cell.
  8. kimthi

    Wide Metal spacing guidelines.

    Hi, Metal spacing is depend on process, supported by foundary.
  9. kimthi

    Low power optimisations

    U can find out from Magma aplication note.
  10. kimthi

    Library for multi-vdd design

    multi vdd I'm reserching theory about MVdd design but I don't have library for it. Plz tell me if you know about the characterizes of the standard cells in this. Thanks,
  11. kimthi

    Voltage level in cell and power gating switches in multi-Vdd design

    Multi-Vdd design Thank you, Ya, the level shifter has 2 different power port connect to different power level. The isolation cell is place between floating points. I means: The standard cell that is the most in multi-vdd design. How many power supply in them? Do all the standard cells have two...
  12. kimthi

    Voltage level in cell and power gating switches in multi-Vdd design

    Hi all, Please help me! I want to know about multi-Vdd library. How many voltage level are there in each standard cell? [Not include: special standard cell ] Power gating switches are used in multi-Vdd design=> what for? Thanks,

Part and Inventory Search

Back
Top