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How to access the special link register, SW in GX-Developer to troubleshoot the CC-Link problem? For example, if my master unable to receive the input from remote I/O station, i may checked status of SW0083 (as written in manual). But i couldn't find this in GX-Developer. i am quite new in this...
thanks KMoffet, I have been busy lately and I have just downloaded and started to undertand its content. Is our knowledge in control system necessary for control panel design? Thx
VSMVDD & KMoffet,
Actually I want the idea of electrical wiring connection. Is this easy to do? Is there guide for me to do this? For example this wire connect to which wire and so on???
hi everyone,
I would like to learn how to design an electrical control panel for a machine. Can anyone recommend me what is the best book regarding control panel design for beginner like me? thx in advanced
Hi,
i have just finished my diplom(Dipl. Ing(FH)) study in electrical engineering in germany. I have a good knowledge of CMOS IC analog design and my final thesis was design of folding and interpolating ADC. I am fresh graduate and i found it tough to get the job in Ic design since all...
Hi everyone,
I'm having a problem to understand how a input voltage represented as dBFS unit. 1.4 V is full scale input of my ADC. From what i have just read, this full scale is same with 0 dBFS. what about input signal below full scale e.g 1.3 V or 1.2 V? What is the dBFS of this input level...
Hi dick_freebird,
For ur info my output of folding circuit is differential but input is single. I tried to make W and L as large as possible but then there is limit that my circuit doesn't function anymore. I have just followed the rule of 1÷(√WL). You can see my schematic on the attachment. It...
Hello,
I'm having a problem to determine the accurate zero crossing of my folding signals. When i compare the ideal zero crossing with the simulate zero crossing there is a deviation aroun 3mV. I have tried to make the size of differential pair transistor larger but i still cannot get the value...
31-to-5 ROM encoder
Hi,
I saw before that 31-to-5 ROM are represented by MOS or bipolar transistor. Is there any simple way to represent 31-to-5 ROM using digital logic?
Regard,
Kickbeer
Hello,
I want to plot a graph SFDR (in dB) versus input amplitude (in V). But i am confused after i saw the graph in the attachment. Instead of voltage the input signal is measured in dB FS. What is FS actually? Can i convert the unit voltage of my signal into a dB FS?
Hi,
There is a phenomonen that i don't understand about the FFT spectrum. I just executed a FFT spectrum of the output of an ideal DAC which is connected to ADc under test.As you can see below, my fundamental signal (inpu signal) is 2 MHz and is the longest in the spectrum. The sampling rate of...
Hello,
Something just popped up my mind. How to measure/display dynamic performance (e.g SFDR) of an ADC as a function of input signal frequency and input signal amplitude? Thanks in advanced
Thanks for that another reply. What i did to calculate the SFDR was, connect The ADC under test with an ideal DAC and did a FFT test to the output of the DAC. But i'm wondering there might be modification of the testbench to calculate SNR and SNDR. Do you have any idea?
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