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modelsim + toggle
I am trying to generate severate coverage reports and merge them after that. This error appear when I merge it and produce a report. I have no idea what it means and I am notsure whether the coverage report generated actually reflects the true result.
What I did was:
vlog...
set_clock_skew
I am not sure what are the replacements for the new DC version for set_clock_skew
switches below: and I cant find the info in sold, please help
set_clock_skew -plus_uncertainty
set_clock_skew -minus_uncertainty
set_clock_skew -ideal
thanks a bunch
analog output pad
I mean my current situation is that when the normal oscillation output coming out from the VCO core to the output pad, it was surpressed by the pad. Thus the signal before going into the pad, which was OK while the signal after going through the pad is gradually decreasing to...
analog output pad
My VCO core had 3 outputs, these outputs performed correctly before they went through the output pad, when they gradually decreases from 3.3V supply to 0V. I was told that the ground might not be connected correctly, but since I have gnd node at every level of schematics...
IO and supply pad
thanks Srivats, it helps. I think I am gonna use 2 Vdd and 2 gnd distributes at opposite end each edge then 1 IO pad at each edge, making a total of only 2 pads per edge.. cheers!
I have a question. Since in digital chip we will place 3 types of supply pads at each edge, do I need to do the same for analog chip?
I only have 1 input and 3 outputs. So can I just place 4 analog IO pad + 1GND each side + 1VDD each side? the GND and VDD are from analog library as well. Thanks
cadence temperature sweep
you can use parametric analysis, go to tools> parametric analysis
then at the form, go to
setup> pick name for variable... > sweep 1
at the form there should be a param called temp or tempdc, click it and enter the desired range.
good luck
The design kit by AMS provided Cgu and Cdu, how do I use this?
Do I consider the MOSFET operation region like when I am using Cox? Say if I need Cgs and Cgd what are the equation relative to Cgu and Cdu? are they in fF/um2 by the way? thanks
Re: frequency pushing
I realised that I am able to either obtain a high voltage swing or a very low voltage swing at the output depending on the NMOS differential pair operational region. Does this affect the supply voltage sensitivity?
I get less with the NMOS in saturation but the amplitude...
My VCO performed badly for frequency pushing. I wonder if I had tested it in the wrong way. hope someone can help out. The differential current controled oscillator uses triple feedback. I tested it with a current sourse at the NMOS bias current and the PMOS load is controlled by a control...
Yes I am imitating that topology at first. Yet there is slight difference which I think might have made my circuit not working. Thus I am now redesign using the concept of the first paper you recommended and it works!
Main idea is I need to use five stages for dual feedback making i=3; and a...
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