Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hello,
i'am doing thesis design lowpass filter on FPGA. I follow document at attachment, I Synthesize is OK but don't "Place & Route". Please help me, thank you very much!
- - - Updated - - -
Sorry everyone, I checked again and Routed with Virtex ML506. please help me convert to Spartan 3E
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.