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Recent content by khamitkar.ravikant

  1. K

    sorry dont like it

    Really good one feel better ... nice look and must update the look on regular basiss.. this is really cool... 8-)
  2. K

    Some VHDL code examples for UART

    VHDL code for UART thanks alot
  3. K

    Microblaze based system Simulation in Modelsim(100 Points)

    one more thing how to add or simulate the test program which are written in c language with modelsim . please guide in this regard also.
  4. K

    Microblaze based system Simulation in Modelsim(100 Points)

    Re: Microblaze based system Simulation in Modelsim(100 Point THANKS FOR EVERYTHING YOU SHARED but now when i run the system file i stuck at 180 ns. as the DCM.VHD file ask for 1 ps resoultion so can u tell me how i can change the resolution to 1 ps in modelsim the error is as follows run...
  5. K

    Microblaze based system Simulation in Modelsim(100 Points)

    i was able to do the procedure and simulate the system but i was not able to simulate in Modelsim SE 6.4 the process not invoked automatically in Modelsim ? please tell me the inner procedure of Modelsim to do simulation thanking you.
  6. K

    Microblaze based system Simulation in Modelsim(100 Points)

    Can any buddy let me know the procedure how to simulate the Microblaze based Embedded system in Modelsim SE 6.4 or later and EDK 11.1 also ISE 11.0 any documentation will also do. but procedure must be clear and there should not be any ambiguity in the doc. thanks
  7. K

    how many transistor will a 256x32bit LUT consume

    this link will help you little https://en.wikipedia.org/wiki/Transistor_count
  8. K

    Output Delay Problem For 32 bit output (+ 50 points for sol)

    i am very happy to tell that i completed all the implementation of the system like i am giving input from gui designed inside VB on PC and kit gives results of encryption and decryption and they get displayed back. also edk tools are used and microblaze core is used to implement the design also...
  9. K

    AES Application - ACTEL FUSION FPGA- 40 points for help

    actel fusion design ideas You can do one thing design the interface using VB or .net on your PC and communicate it with ur kit which will then be used to send stream of data any kind of or a specific tye of file and gui will display the results . and u can do one more thing in that u can store...
  10. K

    part time job earn money daily...

    plaes contact me for details u can earn as money as u can daily just with the help of internet connection.
  11. K

    How to use CPLD with Xilinx FPGA

    use u r normal ise project navigator as usual but instead of device spartan3e family use cool runnerII as device family and then select xc2c64a in that. then next u need to do is read the manual of s3e kit and find packaging of device and speed grade then next write u rprogram and other...
  12. K

    Output Delay Problem For 32 bit output (+ 50 points for sol)

    what is output delay there is significant improvement in the results as i placed the ctout in IOB part and uesd PACE tools to place the same. results are improved from 1.8ns to 1.0ns that is improvement of 800ps. and the device i am using this time is spartan 3e 1600 fg320-4 so if possible let...
  13. K

    Output Delay Problem For 32 bit output (+ 50 points for sol)

    iodelay spartan 3 thanks for reply as i m working on this problem i m sure i will get solution and u r help too is also worth so will relpy as soon as got solution ok .
  14. K

    Input from HyperTerminal to Microblaze using RS232

    uart xilinx microblaze to achieve the input from hyperterminal i used the API documentation function as i declared array of integer and with function XUartLite_RecvByte(XPAR_RS232_DTE_BASEADDR); i have taken input and assigned to the elements of array the input is taken using FOR loop for 16...
  15. K

    Output Delay Problem For 32 bit output (+ 50 points for sol)

    xilinx behavioral register output grounded io Dear all i m taking the output from cryptographic system in 32 bit fromat and at the end by using 32 bit register i m taking output. but problem is that the clock at each flip-flop of register reaches in different time that is skew problem due to...

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