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Recent content by kevine

  1. K

    question reg RTL coding

    you must use RTL style code if the design needs synthsis and transfer to netlist ; you can use behavior level style code when your target is function model ,that you will use behavior style conveniently and freely. only your code is compatible for HDL syntax, this style maybe the normal style...
  2. K

    any body having ARM ebook

    ebook arm a good book, thanks ahead!
  3. K

    anyone can tell me how to use ISCAS’89 benchmark?

    now I 'm doing a DFT(design for testability) experiment,and must use ISCAS’89 benchmark,but I don't know how to use it,who can help me?thanks ahead
  4. K

    What are the differences of ATPG engines?

    Tetr(at)m(at)x engines accoding to my experience,using sequential engine cost more time than combinational engine,and the coverage is less than combinational engine.usualuuy,I use combinational engine to do full scan rather than sequential engine .
  5. K

    Looking for resources about VCS

    VCS hi! wakaka.maybe I can give u some help,my work is doing simulation with VCS. if u need some documents or other materials related , I can email u.
  6. K

    Formality unmatched register

    agree with Ramesh.s. the reasons of many problems can be found in .svf file .U can also observe the match results of FM and compare which parts r matched by name or signature analysis,and then go to find the reasons
  7. K

    Anyone has tutorials for Astro?

    tutorial for synopsys astro I have one,but I don't know whether it is useful for u.anyway I give u in advance.

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