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The devil is in the details. Either a current source or a mos as linear resister, for an agc injects 1/f noise that gets up-converted. It’s a standard problem in x-coupled, tail biased oscillators. There are papers with all sorts of techniques to try and minimise up-conversion from the tail...
Re: A question about transiient analysis
A “oscillatable” oscillator, when simulated in Spice, may or may not start without giving the oscillator a kick start. It can be quite common for an oscillator to not require a kick, but there is no guarantee of this. So, usually one turns on the power...
What CAD kit are you using? In Cadence you can have two views, one with a spice cap, the other containing the moscap, and just do a view switch to the “behavioural” one when simulation speed is required. I don’t see that having LVS faked to report something that isn’t, is an optimum idea.
You would think so, but in practice the AGC loop usually adds more phase noise than which can be achieved by using the simplest one transistor oscillator possible.
I came across this old thread https://www.edaboard.com/threads/183142/ on Sigma Delta ADC regarding issues on integrator gain and inherent inconsistency in the standard linear model.
I therefore post this link as a true explanation...
By default, it accesses data like Vgst (vgs-vt) gds, gm much easier than Cadence. You can just click on the signal name in the docked signal tab tab. Ctrl-shift on say vdsat and vds will display both graphs (e.g. over supply voltage sweep). In Cadence you have to piddle about with the browser or...
Yes I have, consistantly and extensivly for BiCMOS design for over 10 years!. I use it side by side with the £100k+ per seat Cadence. By and large, its results match Spectre nuts on. SS is £100, so yeah, it lacks some of Cadences virtuoso features, however, it has some other features, which...
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