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Recent content by kelvint

  1. K

    How to extract vt and gm max from SPICE

    The schematic is a simple transistor, I would like to extract device parameters (like idsat, idoff, vt_maxgm method, gm etc.) from hspice simulator (using hspice command). Since I need to repeat it with different device type, size, bias condition, I want to do it under spice in stead of plot...
  2. K

    How to extract vt and gm max from SPICE

    Hi Can anyone help me on how to extract threshold (extrapolated using max gm slope) and max gm directly using hspice measure statement ? (the model is a subckt, the parameter LX, LV didn't work). Thanks! Kelvin
  3. K

    How to predict gate oxide breakdown voltage on 1ns CDM pulse?

    Hi I try to get vgmax (ESD damage) on 1ns pulse. If I can get CDM (10n), (5ns) data, how to calculate the 1ns data? Is T2/T1=(V2/V1)^-n the right equation to predict? Kelvin
  4. K

    How to predict gate oxide breakdown voltage on 1ns CDM pulse?

    I would like to predict the gate oxide breakdown voltage under 1ns CDM pulse, what information do I need and how to do the calculation? I have HBM (100ns) pulse gate breakdown voltage. (Definitely I don't have 1ns pulse measurement data). Can I use the equation? T2/T1 = (V2/V1)^-n Do I need...
  5. K

    How to simulate Y-parameter by HSPICE

    Hi I would like to simulate all y-parameters(y11,y12,y21,y22) for MOS by using HSPICE (v2016.06-SP1). I found 2-methods from the web, but the result is different, I would like to know whether any of it is correct? *method-1 xm1 d g s b nfet w=1e-6 l=3e-9 vd d 0 dc vdd vs s 0 vb b 0 vg g 0 dc...
  6. K

    how to make LVS rule for PCELL

    Hi I am new for SKILL. I would like to create a new pcell from scratch (layout, symbol) and make sure it pass LVS. I use SKILL to create symbol, CDF parameter and layout. In layout, I use the following to define the terminal. net = dbCreateNet( pcCellView "n1") trm = dbCreateTerm( net "n1"...

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