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Recent content by KamleshMulchandani

  1. K

    Can a memory controller support ECC if the SDRAM used has a width of x16?

    Hi sps0987, If you are still following this thread. DRAM interface can accommodate 8-bit, 16-bit, 16-bit plus ECC, 32-bit, or 32-bit plus ECC configurations. About your updated question, I dont know what you mean. Because if you use 5 of the x16 that makes it 80 bits data bus. Plus your ECC...
  2. K

    Applications of fixed burst type in AXI

    Thanks jbeniston.
  3. K

    why in fixed burst the address is same for different transfer of the burst

    Hi pkoti83, Fixed burst type is used in FIFO where repeated accesses to the same location such as loading or emptying a FIFO can happen. I can only think of FIFO being used as buffers. Wherein some delay can be added between the transactions. Hope this helps.
  4. K

    Applications of fixed burst type in AXI

    Applications of fixed burst type in AXI? Hi All, Can I know what are the applications associated with Fixed burst type in AXI? I know they are used in FIFO for repeated access to the same location, but I want to know where these FIFOs are used. Thanks in advance
  5. K

    Data inversion in SystemVerilog/ verilog

    Hi , How can I verify data inversion feature in SV or Verilog . Feature details : If inversion =1'b1 ; My data lets say is 4 , 8 , 67 , 45 . should get inverted to 45 , 67 , 8 , 4 . Thanks in advance .
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