Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by kami70b

  1. K

    FSK demoudulator using a PLL and data slicer is cohereent ?

    I am performing correlation based FSK demodulation. Do i need to do symbol synchronization . I mean to say that i am using 64 samples per symbol and after correlation i have to integrate these 64 samples. then my decission is done by comparing one sample out of 64. now if the 64 samples are not...
  2. K

    Phase detection scheme and loop filter

    i am designing a phase lock loop i want to know how can i detect the incoming phase and compute the phase error and what type of loop filter should i use to generate corresponding frequency control words to be given to the nco (vco) to bring phase error to zero
  3. K

    digital PLL design in system generator

    i am working on a frequency hopping transceiver design now i want to synchronize receiver with transmitter hopping frequencies. i am using DPLL for this . i am using a multiplier detector. what filter should i use and how can i make my DDS work like VCO as in analog PLL. i am working on system...
  4. K

    frequency synthesis in a PLL

    i am designing a phase lock loop . i need to know how can i convert a frequency input out of LPF in a PLL to a corresponding frequency to lock on incoming frequency. do i need to use a DDS . i m working in digital domain and input frequency is in binary form. i m using system generator. suggest...
  5. K

    direct digital synthesizer implementation on FPGA

    i wanna know how the phase accumulator works in DDS. if i give a discrete frequency input to DDS how will it generate frequency corresponding to input. i wanna use it in phase lock loop.
  6. K

    DPLL design phase detection technique

    i wanna know that how can i detect a phase in a design of digital phase lock loop in system generator is there a way i got stuck plz help me guys.
  7. K

    transmission of frequencies

    can anybody tell me why sin and cos both should be transmitted in a model of simulink to have its real time implementation or i m wrong about this staement?
  8. K

    phase lock loop in software defined radio

    i have a design of frequency hopping transceiver for a software defined radio i have employed FSK modulation scheme. now i want to implement a phase lock loop in it for improving the synchronization while operating it in two different FPGA kits? i need to know how would i detect phase for...
  9. K

    optical communication link in free space

    which modulation scheme i should use for laser communication and should i go for fpgas for implementing transmitter and receiver
  10. K

    can FR-4 handle 25o watts?

    i have to design an antenna with frequency from 1 to 3 ghz
  11. K

    can FR-4 handle 25o watts?

    can fr-4 material handle 250 watts of power ? what dimensions would be needed ? urgent help needed plz
  12. K

    broad band antenna design with high power handling

    i want to design a broadband antena from 1 to 30 ghz havind gain 10 dbi and power of 250 watts i need ur help guys. please tell me from where i can get relevant information if u have any paper tht would be appreciated
  13. K

    which antenna should be used to design a 234 watt antenna with linear polarization

    i want to design an antenna having 234 watt power having linear polarization and VSWR 1.6 and operated over a bandwidth of 1-30Ghz
  14. K

    help needed for antenna design in IE3D

    i have downloaded the pdf but its damaged and is not opening
  15. K

    234 watts antenna which antenna dipole or what should be used for such high power

    what antenna should i choose , dipole , patch or what for power handling of 234 watts

Part and Inventory Search

Back
Top