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Recent content by kalyansrinivas

  1. K

    If generate statement in vhdl for enabling and disabling hardware

    Thanks for your valuble time Sorry i have a logic for when en_logic = 1 not_gen_logic : if (en_logic = '0') generate in1 <= rx_inp1; in2 <= rx_inp2; in3 <= rx_inp3; in4<= rx_inp4; end generate; -- input to some filter gen_logic : if (en_logic = '1') generate inst_filter : filter port...
  2. K

    If generate statement in vhdl for enabling and disabling hardware

    Hi I want to enable or disable logic using en_logic en_logic is defined as a std_logic input signal from external environment not_gen_logic : if (en_logic = '0') generate in1 <= rx_inp1; in2 <= rx_inp2; in3 <= rx_inp3; in4<= rx_inp4; end generate; but strangely i see an error pointed...
  3. K

    Which is better language for GUI development

    Thanks mrflibble for the answer TrickyDicky : I am looking for developing gui that runs on PC for porting the FPGA bit/sof files and update some parameters like Modulation scheme and Frame length I want to pass parameters to FPGA via GUI running on PC
  4. K

    Which is better language for GUI development

    Thanks for the reply Can u give me some good reference for fpga related library for programming the bit/sof files I understand from this is that matlab gui cannot be used for programming the bit/sof files For FPGA developer learning c++ might be difficult If i choose tcl , Is tcl based...
  5. K

    Which is better language for GUI development

    Which is better language for GUI development TCL or C++ ,VB or using Matlab Which will be fast and can be used for porting the bit/sof file into FPGA
  6. K

    related to radix 2^2FFT for real valued signal

    Hi Radix -2 fft will be using 2 point butterfly structer as a basic building block There is also radix4 fft which uses 4 points for building the fft Regards M Kalyansrinivas
  7. K

    How to make modelsim to take the ini file located in work directory

    How to make modelsim to take the ini file located in project directory Hi Modelsim takes the default ini file In my case the default ini file is write protected and i am unable to update with new libraries compiled I have a ini file with newly compiled libraries in my project directory...
  8. K

    calculation bit error rate in ldpc code

    BER is (Total Errors at receiver)/(Total data transmitted) Regards M Kalyansrinivas
  9. K

    Nfc urgent helpppp ???

    NFC is a very high speed and short range application whereas a RFID is also a short range but a low date rate application As far as my knowledge they are very much different both in hardware and software wise Regards M Kalyan srinivas
  10. K

    Help needed for curve fitting,i need to plot a equation T=k*I^n in matlab

    You can use Least mean square fitting algorithm Search for LMS algorithm in matlab also I think poly2fit is there in matlab toolbox which you can make use of Thanks & Regards M Kalyansrinivas
  11. K

    matlab code for converting a bandpass spectrum to a low pass

    You can do this by multiplying with exp(-j2*pi*f/fs*t) = by cos(2*pi*f/fs*t) for inphase and -j*sin(2*pi*f/fs*t) for quadrature phase than you can sum up them which gives a low pass signal
  12. K

    Identifier "signed" is not directly visible

    Hi tricky dicky how to code a twos complement form For example can i do like this conj_fa_i : signed(7 downto 0); adc_sample : std_logic_vector(7 downto 0);l conj_fa_i <= signed(not(adc_sample)) + unsigned('1'); two's complement as '1' is a std_logic format Thanks & regards M Kalyansrinivas
  13. K

    Identifier "signed" is not directly visible

    thanks for the reply As you mentioned i have to do arithmetic operations only on signed or unsigned data types now my problem is the input is coming from a fifo which is of type std_logic_vector and now i would like to convert it to signed data type I searched and not able to find a type...
  14. K

    How to convert binary fraction to integer value in VHDL?

    Can you subtract a value of 3 (8-3) from the fractional values and display
  15. K

    Identifier "signed" is not directly visible

    firstly thanks for your time Herewith i paste my code, Initially when i started the discussion i said that "Identifier "signed" is not directly visible" for that i made a change in my code instead of using signed to convert a std_logic_vector i used to_signed to convert you can see in the...
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