Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
How to characterize effective capacitances of Mosfet and FinFet?
I want to create testbenches to be able to characterize the effective capacitance of MOSFET first and then the FinFET,
for example cgs, cgd, cgb, cdb and csb.
Could you please help me with that?
I have a specific transistor which is 5 fingers and I made it 7 for the dummy and the dummy is shared in drain with the transistor and the drain of the transistor is connected to something "live" so I am stuck at this point.
Is there another way to make the dummy in this case?
I am trying to design very low power self biased comparator like the one in the attached picture and I am loading the output with two inverters
I need to know what is the design procedures I have to follow also any materials would help a lot
Thank you, But when the compensator has 3 poles it is called type 3 compensator and I have read that type n system means system have n poles at the origin and type 3 compensator has only one pole at the origin.
P.S : I am using voltage controlled.