Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi guys, im trying to do this thing and its hard
i basically want to have 4 seperate pulsetrains to trigger 4 seperate transistors.
so i generate a clock
and divide frequency so something like this ---
https://sub.allaboutcircuits.com/images/14053.png
feed those signals into logic gate...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.