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Recent content by jtbaron

  1. J

    Generating SAIF using VHDL and Synopsys DPFLI with ModelSim

    saif modelsim u could use modelsim to dump vcd and use vcd2saif which is provided by DC to convert the vcd files to saif files.
  2. J

    How to back annotate SDF to VHDL?

    u can write module in verilog format,and componet in your top-level testbench.
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