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schematic voltage reference
I don't agree with your simulation schematic.
You are correct to cut both the loops of the opamp, but where will you look at your fed back signal (for phase analyis )?
The way I usually do it is cut at the output of the amp, then you've got both loops in one shot ...
The only reason I can think of :
the output impedance of the current mirror is rdscascode//rdsmirror.
These impedances are largely dependent of the length. (the higher the length, the bigger the rds.)
So the most optimal choice is to have the lengths equal to have the impedances +- equal...
reducing offsets in opamps
If this is a systematic offset, you should double check your design. Systematic offset in your opamp can be the effect of :
-low loop gain
-transistor that are biased in their triode region
-inequal W/L's in current mirrors and or differential pairs.
More important...
diode connected transistor saturation
The left one is not a current mirror.
This is just a diode connected NMOS, with a cascode to keep the drain voltage constant. There is nowhere current mirrored.
The left one is just a way of biasing the cascodes in the right one. (which is a normal high...
When using a class A output, use an nmos driver with a pmos output. This isn't noticeable in AC sim, because of the small signal linearization, but for transient PSRR simulations (takes a lot of time, but these include the non-linearities of the transistors)
this is clearly visible.
2nd tip is...
When you refer to signal bandwidth, is this the amplifier bandwidth ?
For autozeroing, what you basically do, is sampling of the offset on a cap. This causes a foldback of the noise equal to signal bandwidth/autozero frequency.
In your case, you have 10kHz signal bw and 30kHz autozeroing, so...
In Spice I do this by passing parameters with the subcircuit.
This way you can change (almost) any component value in the subcircuit.
I´m not sure whether this can be done with Hspice too.
Hi,
M18 is a mere source follower. It´s source will follow the gate voltage by 1 Vt.
I think it´s use here is a level shifter.
The circuit M18-M51-M53 is a feedback loop that will try to equalize the currents (or a certain ration of currents) between M51 and M53.
R3 and R2 together with M58...
I find it pretty hard to apply self biasing and still have a
-stable bandgap circuit
-good start up behavior
It can be done, but I prefer simple resistor + current mirror biasing,
plain and simple, and it always works.
How I would do it :
Connect the current mirror to analog ground (M1 and M2), so you are sure of a good mirroring without body effect.
The current through M1 and M2 will normally stay constant, so it it will not disturb the analog ground too much. (considering that at least one of the input...
This is indeed a folded cascode OTA.
Your simulation shows rubbish, it looks as if you're using/simulating the amplifier in a wrong way. You typically get these kind of results when there is no gain available.
Possible reasons :
-bad current source biasing (not in saturation)
-bad cascode...
Well, the easiest to check AC stability is to cut the circuit at a point where you have all the feedback loops included, and this is at the output of the OTA.
Concerning the biasing, I would use a simple current mirror biased with a resistor to bias the cascodes and/or current sources.
I...
Re: bandgap and op-amp
Hi,
You need to assess both loops in one time. The way I do it :
Cut at the amplifier output, inject at the current source nodes, and see what's coming back from the amplifier output. (keep in mind DC bias and avoid AC into the output).
You cannot just play with the phase margin of the amplifier itself, you have to look at the overall bandgap circuit stability.
The bandgap is in fact a combination of a feedforward and feedback circuit, where you try to equalize the Vbe to the Vbe_x + Vt node.
Make sure you do a correct...
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