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Yes and no. The simplest way to see the difference is using a DC input. The Nyquist ADC will output one digital value (provided the device and input noises are less than 0.5LSB). The SD ADC will output two values, due to the fact that the SD loop will try to stay around the signal. No static...
A sigma-delta ADC is a dynamic chaotic system therefore the DNL/INL do not make much physical sense since they do not represent the static transfer function of the ADC. Of course you can use the histogram method, as suggested by erikl, for comparison with other ADCs but it won't have much meaning.
I just thought of a simple "winner-takes-all network" as, for example, the paper by Donckers. Simple, small and elegant. I used a similar configuration to compare 320 current years ago.
It depends on your requirements. Sometimes a simple differential pair is enough, sometimes you need a more complex amplifier. If you are driving a capacitive load only, a folded cascode op-amp would probably work well.
The bandwidth of the amplifier should be large. When you close the loop you...
Before looking into the buffer, check your clock timing. Glitches might be created by (dis)connecting the capacitors at the wrong time. As a side note, the bandwidth of the buffer should be larger than 4MHz but be aware that if it is too wide it might allow too much noise.
It is quite simple, you just need to split the positive and negative halves:
module gauss(p,n);
output p,n;
electrical p,n;
parameter real a=1 from (0:inf);
parameter real b=10n from [0:inf);
parameter real c=5n from (0:inf);
parameter real d=0;
analog begin...
What you are experiencing is called "subsampling". If this is not what you want, you are setting up your simulation environment incorrectly. Moreover, the Nyquist criterion says: fin<fs/2, where the "<" is strict. That means that if you want to reconstruct your input signal, you must sample at a...
You need to run longer simulations! The frequency resolution depends on the simulation time with the bandwidth depends on the sampling frequency. You probably are taking a large number of points in a very short simulation.
What is the resistance you are trying to obtain and why do you need such an accuracy? Have you considered automatic calibration using a mos in triode region instead of trimming?
If you are using verilog-a, you do not need spectreVerilog but just spectre. Verilog-a is supported without any extensions. If you are using pure verilog, then follow dick_freebird's advice.
I would have to try them but I believe the first method is the most effective.
You just need to multiply the FFT of your signal by the complex exponential function that represents the delay and than apply an IFFT to bring it back to the time-domain.
I am not very good at optimizing code. Maybe someone else can give you a hint on this.
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Yes, it is correct but it creates a BIG vector... do you need to use the whole signal? Can you split the signal into chunks? I...
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