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Recent content by jigisha

  1. J

    Difference between Satellite? Terrestrial Link??

    Hello .. Can any one explain me, what is the difference between Satellite Link and Terrestrial Link ? How then fundamentally differ? Thank You.
  2. J

    UMC 180nm low threshold cmos library

    Hi.. https://www.mosis.com https://www-device.eecs.berkeley.edu/bsim/?page=BSIM3_Arc Enjoy...
  3. J

    need help on Clamper circuits

    Hello all.. i was teaching clamper circuit in Basic electronics course...but students had a difficulties in accepting the presence of capacitor n its charging process..... so can any one suggest any good animation or good reference book where students can really accept the concept... i have...
  4. J

    [Moved] need help on 0.18um model card....

    hello all.. For 0.18um CMOS technology, when i searched on MOSIS i found various model cards...how to decide which model card will be best suitable for my cascode CS LNA design...?? please suggest... thank u..
  5. J

    layout extraction in microwind from DSCH....

    hello all.. i m making layout of LNA using microwind and DSCH.. but full circuit is not extracted when i export DSCH layout in microwind... only MOSFETs and resistors are extracted..not inductors.. my design include 5 inductors... please help... what i should do...??
  6. J

    cascode for more gain

    i think area and powerdissipation may be....
  7. J

    Analog IC design/layout books

    thank you all for honest replies... but i m beginner....yet i m confused whether i use microwind or l-edit to draw layout.. I m a PG student, doing dissertation on LNA. And i have to use free available tools only as no facilities in my college...!! my LNA design includes 5 inductors, 3 MOSFETs...
  8. J

    How long does analog IC circuit design take

    hello sir... i have to make layout of wideband cascode common source LNA..which includes 3-MOSFETs, 5 inductors, 3-capacitors, and few resistors... sir how much time it will required to prepare complete layout?? i m very new to layout design tool microwind.. please guide... thank you..
  9. J

    how to design layout of LNA??

    hello all.. i have to design layout of LNA using Microwind... i have learn how to make layout of invertor...but i m confused for analog circuit as i contains L,R and C..in my circuit i have 3 MOSFETs, 5 inductors, 4 capacitors and 2 resistors... please help that from where i should start...
  10. J

    how to design Current reuse LNA?

    hello all.. how to design current reuse topology in existing common source cascode LNA for reducing power dissipation....?? thank you...
  11. J

    what is difference btw TSMC and BSNIM?

    ok....i have designed one LNA with 0.18um CMOS... in 0.18um file it is written that version= 3.1 level= 49.. now i want to simulate same designed circuit with 0.18um into 0.13um...and want to check its behavior when MOSFET size will reduce...but i m not getting proper file for 0.13um and highly...
  12. J

    what is difference btw TSMC and BSNIM?

    hello alll... i m bit new to T-spice.. when i searched for 0.13um technology file from MOSIS, i came to know across such words and whatever file i have downloaded could not worked with my netlist which was generated with tspice 0.18um cmos... can anyone explain why?? what are such things...
  13. J

    LNA bias current, scaling factor,Noise Admittance Optimization

    hi... u can refere 1. B.Leung, “VLSI for Wireless Communication”, Pearson Education Inc,2004. 2. B. Razavi, “Design of Analog Integrated CMOS Circuits”, Mc-Graw Hill, 2001. 3. Allen hollbergue, "CMOS-Analog-Circuit-Design" 4. T.H.Lee , "the design of cmos radio-frecuency entegrated circuits" 5...
  14. J

    need guidance : CMOS ultra Wideband LNA

    i have gone through so many IEEE papers, in which i come to know that.....in Ultra wide band applications i.e. 3.1 to 10.6 GHz spectrum bandwidth is more important...not only BW but flat gain over entire band is also mandatory..... Now as we go for band width extension, the NF will increase and...
  15. J

    need guidance : CMOS ultra Wideband LNA

    hello all.. For CMOS Ultra Wideband applications (UWB) of Low Noise Amplifier there exist a trade off between few design parameters viz.... 1. power consumption 2. wide bandwidth 3. Moderate but flat gain on entire BW 4. Low Noise Figure 5. Linearity / IIP3 i m searching of IEEE papers but...

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