Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi, I've written a structural code for DFF, using Transmission gates. The diagram is attached. But when i tried to simulate in iSim , i did not get the output rather i got the message that :more than 10000 iterations. What is wrong here?
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity DFF is...
I wrote a RAM memory with Bidirectional Data... But when I wrote a small test bench i am not getting the proper Data out. Whats wrong here?
My code:
entity ram is
generic (
DATA_WIDTH :integer := 8;
ADDR_WIDTH :integer := 8
);
port (
clk :in...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
