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Recent content by jaydnul

  1. J

    3 stacked mosfets equal to one longer mosfet

    In the below diagram, where would the backgates of the 3 mosfets have to be placed in order for this to be true and equal to one device with lenght 3um? I imagine they have to connected to there own respective sources because if they were all connected to ground, then the top device would have a...
  2. J

    Why BJT is used for voltage reference and not CMOS

    Hello there, I'm curious why the PN junction of a BJT transistor is still used as the CTAT voltage in a reference circuit (bandgap), while a MOSFET threshold voltage also has CTAT behavior? Is it because the BJT has exponential behavior while the MOSFET is just the square of the voltage? Why is...
  3. J

    Does the Razavi cover art make any sense?

    Hi, I have a copy of the Razavi CMOS indian edition and have been looking at the cover for the past 20 minutes :laugh: https://easyengineering.net/wp-content/uploads/2018/01/81-Fyis7toL.jpg So first of all there is a typo i think. The two inputs of the op amp clearly shouldnt be shorted, but...
  4. J

    Difference between 180nm and 130nm with same W/L ratio

    I guess I'm wondering why the oxide thickness tracks with gate dimension? If you have a lower oxide thickness, you'll have a bigger Cox and lower threshold, but why can't a 180nm process have the exact same oxide thickness as a 130nm process? Also, take a 180nm process, the smallest pattern you...
  5. J

    Difference between 180nm and 130nm with same W/L ratio

    Im curious what this difference would be? If you sized both of them, say 5um/1um, would there be any performance differences? If so why? Thanks!
  6. J

    What does the LOOP GAIN's phase and gain margin say about the CLOSED LOOP response?

    How does gain margin affect transient response? The phase margin of a negative feedback amplifier affects the overshoot, so what does the gain margin affect? Does it affect the settling time? Thanks
  7. J

    What does the LOOP GAIN's phase and gain margin say about the CLOSED LOOP response?

    Starting with an open loop system, you specific frequency gain and phase response plots. If you provide negative feedback, then that plot then gets split in half. The top portion is the loop gain and the bottom portion is the closed loop system response. When you do stability analysis, it is...
  8. J

    Example of a RHP pole in a CMOS circuit?

    I have still yet to see a RHP in my study of CMOS IC circuits. Could anyone give me an example? Or do you ever see them? Also, is there a way to tell if a zero is going to be LHP or RHP without deriving the transfer function first? Thanks
  9. J

    [Moved]: What are the general guidelines to quickly identifying poles and zeroes?

    Re: What are the general guidelines to quickly identifying poles and zeroes? If a pole can be found as 1/RC, then why do you sometimes see (like in a 2 stage op amp) the poles represented as gm/C? That suggests that they are multiplying the original pole by the gain (since Av/RC = gm/C). But why?
  10. J

    [Moved]: What are the general guidelines to quickly identifying poles and zeroes?

    Without deriving the transfer function, what is the general method of identifying poles and zeroes of an arbitrary circuit? As I understand so far, to find a pole you short the voltage source and calculate the total resistance to ground and the total capacitance to ground. Then the time constant...

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