Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by jayaneethipathy

  1. J

    why is synopsys library compiler used for??

    i am inneed of std cell lib for synopsys design compiler where to find or if any one having means plz post it and also procedure for to use synopsys design compiler
  2. J

    how to synthesis synopsys -verilog compilation s(vcs)

    i am a beginner in synopsys tool. plz help me to compile a verilog code in vcs and also in design vision.. i encountered problem in library setup if i want a new lib or any existing lib........ existing lib means where it wil be?? thank u

Part and Inventory Search

Back
Top