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Recent content by javad

  1. javad

    How to select ferrite Bead in your Design ?

    See this, maybe useful: AN 583: Designing Power Isolation Filters with Ferrite Beads for Altera FPGAs www.altera.com/literature/an/AN583.pdf
  2. javad

    Need info to design 1553 bus controller in VHDL

    Re: Arinc 1553 in VHDL 1553 Encoder/Decoder 1553 Encoder/Decoder
  3. javad

    Approximation for Tan inverse in fixed point

    how to see tan inverse Also see this book: Streamlining Digital Signal Processing: A Tricks of the Trade Guidebook by Richard G. Lyons https://rapidshare.com/files/170718128/Streamlining_Digital_Signal_Processing.pdf
  4. javad

    FPGA + PC/104 Computer

    Hi all, I want to make an ISA interface between one Xilinx Virtex-II FPGA and a PC/104 single board computer. ISA bus is delivered through PC104 bus and is 5v, so I use level converters to mach FPGA 3.3v to this. The problem is when I place FPGA on ISA bus, the computer can not be started! (The...
  5. javad

    FPGA Development Board with 2 fast ethernet phys

    Hi all, Do you know a FPGA Development Board with 2 fast ethernet phys? Thanx.
  6. javad

    Spartan-3 I/O pins during configuration

    io pins of spartan3 Hi, How can I prevent FPGA I/O pins from going High(Active) during configuration process? Thanks.
  7. javad

    Virtex-II module error: The BSDL for device is out of date

    Re: ERROR with Configuration There are just two programmable devices on the board : FPGA and Programming Flash. I asked the vendor, but they didn't say any useful thing!
  8. javad

    lcd and keybord driven by fpga

    SEE "VGA/LCD Controller" project at opencores.org **broken link removed**
  9. javad

    Virtex-II module error: The BSDL for device is out of date

    ERROR with Configuration Hi All, I want to use a Virtex-II plug-in board module. The following error message occurs when I initialize the JTAG chain: "ERROR:IMPACT:477 - The BSDL for device 'unknown' is out of date. Please check your installation." After I select OK, It shows 9 "unknown"...
  10. javad

    ANY EXPRIMENT with XILINX "XAPP253" DDR SDRAM Cont

    xilinx xapp253 Did any one implement and use the 266 MBits/s DDR SDRAM Controller in xapp253?
  11. javad

    Need DDR SDRAM controller for Xilinx Virtex II or Spartan 3 FPGA

    Re: DDR SDRAM CONTROLLER OK! But It only supports Burst_Length = 2 and provides unidirectional DQS.
  12. javad

    Need DDR SDRAM controller for Xilinx Virtex II or Spartan 3 FPGA

    Hi all, I'm looking for a free good controller core for micron ddr sdram "mt46v16m16" to be implemented on xilinx virtex2 or spartan3 FPGA. I would be pleased if you help me to find that. If this core supports burst lenght = 8 and bidirectional DQS signal, it's much better for me. Thanks.
  13. javad

    Development Board with a lot of I/O

    Hi all, I'm looking for a development board for Xilinx Virtex family (V-II, V-II pro and specially V-4) with over 320 I/O connectors. I prefer the price less that $1000. Thanks. M. J.
  14. javad

    ATA Ultra DMA Controller on SPARTAN-3

    Hi All! I have designed an ATA UDMA controller on Xilinx Spartan-3 device. When I use 40-conductor cable, it works well (UDMA-2 is OK) but when I use 80-conductor cable, it does not work!(even UDMA-0) I think there is a problem with my IDE interface(physically). What do you think? Thanks all.
  15. javad

    Power supply for Xilinx Flash: XCF08PFS48C

    Hi all, What is the recommended power supply IC for this programming FLASH?

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