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fuding ge
Please kindly send me the Fudong Ge's analog interview question if you have.
i failed to link his web.
and my email is : huxbo.sz@gmail.com
Thanks &Regards
It is a bit complicated. However, I do believe the spike is due to your loop-response (I assume you are working on a bandgap needing a amplifier for voltage clamping). In order to feel what's that mean, you can try over-compensate the ampifier in your bandgap and then redo the simulation...
I simulated the starup of bandgap reference with a PWL source which ramp from 0 to vdd, and get a ripple(spike) about 400mv at the stable point.(stabe Vref=1.25v, the spike is 1.65v).
1) Why the ripple happen and does it mean any problem in my starup circuit?
How can i eliminate it if i...
hi Pra,
The DC bias voltage are always needes in any simulations. by sweeping the bias
voltage you can get the appropriate value and then generate them through bias circuits and current mirror.
the slew rate can be computed by the whole current and the capacitor at the this leg and...
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