Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
this signal is connected to multiple drivers
Whoops, I copy and pasted the wrong parts, this is what it should look like. Also, i need a conversion done per clock cycle, thats why I put the clk in the sensitivity list?
module converter(clk, colorin, out_rgb);
input clk;
input [11:0]...
multi-source in unit verilog
Hello, I am just beginning to learn Verilog, and am using ISE 10.1.
I am trying to make a custom color converter based on my own table, but am getting the following errors:
Multi-source in unit <converter> on signal <out_rgb<11 to 0>>; this signal is connected to...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
