Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by jamesfeng1981

  1. J

    PIP capacitor VS MIM capacitor

    capacitor fingered caps mim need one more metal layer too
  2. J

    Promlem with dc_shell

    Please use solvenet to find problem. There are so many useful answer
  3. J

    Why is the Cadence so slowly, when to change finger ?

    If you are reahat enterprise 3.0,Please change the version.
  4. J

    Problem with Cadence as Spectre simulator opens several minutes

    help with cadence What's your linux version? It has relation witn linux
  5. J

    Problem with exporting layout data in Virtuoso XL

    Layout automation It is not usful for analog layout
  6. J

    how to layout bondpad?

    Just follow the design rule. And make sure in your bondpad you have the top metal. That is enough
  7. J

    analog layout engineer-skills needed

    YES, i think so, Match is so important and think about noise is goof
  8. J

    MOS Layout question PLs ANswer

    I think no resolution. As Length you can not reduce?If you reduce Length just reduce width too in your design. But If your designer does not allow this. No solution
  9. J

    how to layout bondpad?

    Just follow the design rule. Then it is ok Added after 1 minutes: Who can tell me how to add my points. As I can not download some usefule material
  10. J

    ADC/DAC layout issues

    I am a new layout of sigma-delta adc. Who can give me some advice about the floorplan? And layout note. The transister on the two differential road's floorplan? The cap match?? Cmfb 's location? And so on? Thanks very much Added after 1 minutes: Or just send to my...

Part and Inventory Search

Back
Top