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Recent content by jalalba

  1. J

    CAN V3.2 xilinx

    Hi in CAN V3.2 xilinx core example design, when I'm simulating a can_v3_2_tb, I'm see Data sending and receiving operations are performed successfully but CAN_PHY_TX and CAN_PHY_RX always High (Does not change). So how are the data transmitted?
  2. J

    Need USB3 FTDI or cypress HDL code

    Hi everybody, I need usb3 HDL code (FTDI or cypress). Can simeone help me and send a simple HDL code? Thank you
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