Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by jackym

  1. J

    Create path option in cadence layout

    press P ,and then press F3, you can change the metal layer
  2. J

    Comparator at low-voltage

    you can use a two-stages comparator with PMOS input
  3. J

    how to simulate the 1/f noise in specture

    I want to simulate the 1/f noise in specture,but don't know how to simulate ? I hope someone help me .thank you !!
  4. J

    how to calculate the Power Function

    calculate power function I feel difficult to calculate the PF from this picture .The picture is the simulated result of a buck circuit. In Candence, I use the average of the power to divide the product of the Vrms and Irms. The PF only have 0.5, I feel it's wrong .But I don't find the cause.I...
  5. J

    how to calculate the PF from this picture

    how to calculate the PF I feel difficult to calculate the PF from this picture .The picture is the simulated result of a buck circuit. In Candence, I use the average of the power to divide the product of the Vrms and Irms. The PF only have 0.5, I feel it's wrong .:|But I don't find the...

Part and Inventory Search

Back
Top