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May I know why the value of load regulation in my LDO circuit is more than 1.
The value supposed to be 0.XX something.
Is there any factor will affect load regulation?
Any recommended method to measure load regulation in cadence simulation?
I trying to measure Power Supply Rejection Ratio (PSRR) of LDO,
but the output ac voltage is bigger than the input ac voltage.
the output ac voltage should be smaller than the input ac voltage.
base on the formula, PSRR = 20log(Vout,ripple/Vin,ripple ) in dB.
is there any wrong with my...
Hi, d123.
Thank very much.
now, i able to get around 2.0V. (all the transistors are operate in saturation mode.)
Because, I was increasing the value of load resistor to 10K , increase voltage on transistor M6. and increase Vdd.
Is is logic and correct method ?
later, I will try to use...
Hi, dick_freebird.
Do you mean change the current source ?
If i increase the R load value to 10K Ohm , I was able to get 2.0V.
May I know how the verify the design is a voltage regulator? Is is depend on the Vref value close to Vout or Vin value close to Vout?
now I was able to get some output voltage , which is around 1.2V.
May I know why some of PMOS (5 transistors) are not operate in saturation mode.
*region number 2 is saturation mode.
@dick_freebird
now, I was able to get oupout, which around 1.2V.
Frankrose told me, all PMOS bulks connected to source.
its efficiency around 55.54%.
Do you have a any sugguestion to improve efficiency ?
@dick_freebird
Hi , thanks your sugguestions.
Can u help me check my schematic circuit, it there any wrong with the parameter or connection ?
I was not able to get 2V.
@d123
I very appreciate the knowledge you shared.
In simulation, I was not able to get 2V at output voltage . (my simulation result show around 689mV)
i using the the reference example you shared and my resistance value and capacitance.
Vin=2.2V, R1=1K, R2=11K, Curent source =100uA, C laod...
Hi and Thanks,
you are nice person for helping me find reference.
In my simulation, the Vref directly using a voltage source. it is a fixed value.
I areadly read the book (pg810-817) you suggest.
I still do not really understand. Because this is my frist time design a LDO circuit.
For...
Thanks for answering my question.
I try to design a LDO.
With these parameter:
current sorce= 100uA
Vref= 1.8V
Vdd= 2V
R1= 1K
R2= 11K
Cload= 20pF
Rlaod=1K
it there any wrong?
- - - Updated - - -
Thanks for relying me.
this design is used for simulation purpose with 0.18um technology...
Hello,
Can anyone suggest the possible value of current source, Vref, VDD, R1, R2, Cload and Rload to me.
Because I trying to run a simulation on cadence software based on LDO design.
Thanks.
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