Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
hello,
I want to design DDR RAM.anybody can suggest me how can i design a row decoder and column decoder using less transistors.here i give a picture of a row decoder.but i can not understand how i sketch the row decoder from this picture.
thanks
Shayadul Alam
hello,
I want to design basic DDR RAM. So anybody can give the answer? I need the information about basic DDR RAM. Such as .......
What we need to design a DDR RAM.
Basic layout design.
schematic design.
smallest area.
highest speed.
lowest power...
hello,
i want know about high performance standard cell and its parameters and characteristics ...please help me about this...
1.what is it definition...
2.advantages......
thanks
hello,
i want to know briefly about high density , routing track, multi channel to design standard cell in IC in VLSI.please help me......
such as...........
1.what is high density ?
2.what is its purpose to design standard cell?
3.advantages....
what is tracks...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.